JEE Mains · Physics · STD 12 - 14. Semicondutor electronics
\(\begin{array}{c|c|c} A & B & Y \\\hline 0 & 0 & 1 \\0 & 1 & 1 \\1 & 0 & 0 \\1 & 1 & 1\end{array}\)
To obtain the given truth table, following logic gate should be placed at G :
- A OR Gate
- B AND Gate
- C NOR Gate
- D NAND Gate
Answer & Solution
Correct Answer
(C) NOR Gate
Step-by-step Solution
Detailed explanation
For NOR gate : \(\overline{\mathrm{A} \overline{\mathrm{B}}}=\overrightarrow{\mathrm{A}}+\mathrm{B}\)
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