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JEE Mains · Physics · STD 12 - Semicondutor electronics
  • JEE Mains 2025
  • Easy
  • MCQ


\(\begin{array}{c|c|c} A & B & Y \\\hline 0 & 0 & 1 \\0 & 1 & 1 \\1 & 0 & 0 \\1 & 1 & 1\end{array}\)
To obtain the given truth table, following logic gate should be placed at G :

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Answer & Solution

Correct Answer

(C) NOR Gate

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Detailed explanation


For NOR gate : \(\overline{\mathrm{A} \overline{\mathrm{B}}}=\overrightarrow{\mathrm{A}}+\mathrm{B}\)
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