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MHT CET · Physics · Semiconductors

The resultant logic gate from the combination of following gates is
image

  1. A OR
  2. B NAND
  3. C AND
  4. D NOR
Verified Solution

Answer & Solution

Correct Answer

(A) OR

Step-by-step Solution

Detailed explanation

Inputs to NAND gate: \(\bar{A}, \bar{B}\) Output: \(Y = \overline{\bar{A} \cdot \bar{B}}\)
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