MHT CET · Physics · Semiconductors
The logic circuit in figure is equivalent to
- A OR gate
- B AND gate
- C NOR gate
- D NAND gate
Answer & Solution
Correct Answer
(D) NAND gate
Step-by-step Solution
Detailed explanation
The output of the NAND gate will be \(\overline{\mathrm{A} \cdot \mathrm{B}}\).
The output of the NOR gate will be
\(\overline{\overline{\bar{A} \cdot \mathrm{~B}}+\overline{\overline{\mathrm{A} \cdot \mathrm{~B}}}}=\mathrm{A} \cdot \mathrm{~B}\)
The output of the NOT gate will be \(\overline{\mathrm{A} \cdot \mathrm{B}}\) Thus, the given network is equivalent to a NAND gate.
The output of the NOR gate will be
\(\overline{\overline{\bar{A} \cdot \mathrm{~B}}+\overline{\overline{\mathrm{A} \cdot \mathrm{~B}}}}=\mathrm{A} \cdot \mathrm{~B}\)
The output of the NOT gate will be \(\overline{\mathrm{A} \cdot \mathrm{B}}\) Thus, the given network is equivalent to a NAND gate.
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