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MHT CET · Physics · Semiconductors

In the following digital logic circuit, the output Y will be ' 1 ' for inputs

  1. A \(\mathrm{A}=0, \mathrm{~B}=0\)
  2. B \(\mathrm{A}=0, \mathrm{~B}=1\)
  3. C \(\mathrm{A}=1, \mathrm{~B}=0\)
  4. D \(\mathrm{A}=1, \mathrm{~B}=1\)
Verified Solution

Answer & Solution

Correct Answer

(D) \(\mathrm{A}=1, \mathrm{~B}=1\)

Step-by-step Solution

Detailed explanation

\(\therefore\) There are two NOR gates, one NOT gate, and one NAND gate.
\(\therefore\) Output of NAND gate: \(\overline{A \cdot B}\)
Output of NOT and NOR Gate: \(\overline{\overline{\mathrm{A}}+\mathrm{B}}\)
Final output: \(\overline{(\overline{\mathrm{A} \cdot \mathrm{B}})+(\overline{\overline{\mathrm{A}}+\mathrm{B}})}\)
So, the output \(\mathrm{Y}\) is 1 only if the input \(\mathrm{A}\) and \(\mathrm{B}\) is 1.
\(
\begin{aligned}
& \mathrm{A}=1 \\
& \mathrm{~B}=1 \\
& \mathrm{Y}=\overline{\overline{1 \cdot 1}+\overline{1}+1} \\
& \mathrm{Y}=1
\end{aligned}
\)