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MHT CET · Physics · Semiconductors

In the following combination of logic gates, the output \(Y\) can be written in the terms of inputs A and B as
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  1. A \((\mathrm{A} \cdot \overline{\mathrm{B}})+(\overline{\mathrm{A}} \cdot \mathrm{B})\)
  2. B \((\mathrm{A} \cdot \mathrm{B})+(\overline{\mathrm{A}} \cdot \mathrm{B})\)
  3. C \((\overline{\mathrm{A} \cdot \mathrm{B}})+(\overline{\mathrm{A}} \cdot \mathrm{B})\)
  4. D \((\overline{\mathrm{A} \cdot \mathrm{B}})+(\mathrm{A} \cdot \overline{\mathrm{B}})\)
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(C) \((\overline{\mathrm{A} \cdot \mathrm{B}})+(\overline{\mathrm{A}} \cdot \mathrm{B})\)

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